Package, Pin & Functional Compatible
FPGA to ASIC Conversion
FPGA to ASIC Migration
FPGA to ASIC Replacement
FPGA Volume Production
FPGA vs. ASIC
FPGA Feature Compatibility ► Seamless Migration to mcFPGA
The mcFPGA products are architected ground-up to enable seamless FPGA to ASIC migration from Altera or Xilinx designs to BaySand MCSC platform solution. The following table shows the FPGA product families and Series that are supported by mcFPGA family of products and its features.
|FPGA Features||Altera||Xilinx||BaySand mcFPGA|
|Logic Cells||Stratix Series|
|IO Standards / Performance||mcMPIO|
|External Memory Interface||mcPHY|
|External High Speed Interface||mcPHY|
|PLL/DCM & Clocks||mcPLL|
|IO Pins and IO Banking||Compatible and Flexible Banking|
Package and IO Options
mcFPGA supports all sorts of FPGA packages from wirebond to flip-chip. Seamless package and pin migration from FPGA to mcFPGA is achieved as mcFPGA does not have fixed maximum number of IO pins per IO bank as in FPGA. The number of possible IO banking is beyond the largest FPGA, thus making FPGA package pinout just a subset of possible mcFPGA pinout variants.
Lowest Power Consumption (Upto 10X Power Reduction vs. FPGA)
Power is becoming the primary concern for most FPGA designs. Beyond meeting thermal constraints, lowering power improves system cost and reliability, and supports increased performance.
By leveraging power advantage of MCSC Technology (inherent ASIC-like power advantage), mcFPGA devices can achieve upto 10X power reduction compared to FPGAs by lowering both static and dynamic power consumption. The power advantage opens new design methodology for customers and their applications which could not have achieve by only FPGAs.
- System designs with FPGA (high power) for TAT → mcFPGA (for production with power reduction)
- Opens up stringent power application where FPGA cannot be used