Technology & IP Licensing

BaySand provides licensing at multiple levels of IP and product.
Licensable IP includes

  • BaySand’s MCSC Foundation Technology
  • BaySand’s MCSC IPs
  • A rich set of licensable functional system blocks

Licensing Model

BaySand’s technology licensing model consists of the following elements:

  • Technology Licensing Fee for access to all BaySand IP’s in the specified technology node.
  • Additional Technology Licensing Fee for each additional process node.
  • NRE for custom IP development or porting to a customer specified technology node.
  • Annual maintenance fee per process node and selected IPs.
For more information, contact BaySand.

MCSC Foundation Technology

MCSC Foundation Technology is licensable at the complete process specific technology library as listed below to provide you with a head start to accelerated product design, minimal NRE and development cost and fasted time to market.

* Scroll to the right for more info.
MCSC Foundation Technology MCSC-G65L MCSC-G40L MCSC-S28S MCSC-T28M MCSC-T28C MCSC-M55L
Process Technology 65nm
(LP)
40nm
(LP)
28nm
(FD-SOI)
28nm
(HPM)
28nm
(HPC)
55nm
(LP)
mcCORE Metal Configurable Standard Cells
UD
mcBRAM Metal Configurable Memory
UD
mcRF Metal Configurable RF (Register File)
UD
mcMPIO Metal Configurable I/O
UD UD UD
mcPLL Metal Configurable PLL
UD UD UD
mcPMA Metal Configurable Transceiver
UD UD UD UD
mcPCS Metal Configurable Physical Coding Sublayer
UD
mcPHY Metal Configurable DDR/LVDS PHY
UD UD UD UD
XPresso Memory, PHY, Transceiver Configurator/Wizard
UD UD UD UD

*UD: Under Development

MCSC IPs

MCSC IP is licensable as individual IP elements or collections of IP elements from a specific process technology library as listed below. Parametric, power, performance, and where applicable, physical dimensions of MCSC IP elements for a specific MCSC Foundation Technology can be refer to “Technology/MCSC Foundation Technology” page.

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IP Availability
Physical IP
  • 65nm Standard Cell Library (GF 65nm LP)
  • 40nm Standard Cell Library (GF 40nm LP)
  • 28nm Standard Cell Library (TSMC 28nm HPC)
  • 28nm Standard Cell Library (ST 28nm FD-SOI)
PLL
  • GF 65nm LP
  • GF 40nm LP
DLL
  • GF 65nm LP
  • GF 40nm LP
PHY
  • GF 65nm LP
    • Multi-protocol Serdes supports up to 6.5Gbps
  • GF 40nm LP
    • Multi-protocol Serdes supports up to 12.5Gbps
  • GF 40nm LP
    • MIPI D-PHY 1.1

Transceiver Solutions & IPs

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Transceiver Protocol Solution Availability
Protocol Controller PHY Status
65nm PCIe – Gen 1/2 RC/EP/SW (Ready) Completed
XAUI Ready Completed
GbE Ready Completed
SATA – Gen 2/3 OD Completed
V-by-One OD Completed
Other Protocols OD TBD
 40nm PCIe – Gen 3 RC/EP/SW (Ready) Completed
XAUI Ready Completed
SDI OD Completed
V-by-One OD Completed
SATA 3 OD Completed
SAS 3 OD Completed
Interlaken OD Completed
JESD204b OD Completed
Other Protocols OD TBD

* TBD: Currently Under Development
* OD: On Demand

* Scroll to the right for more info.
Interface Digital IPs
Interface Availability
PCIe Gen1 RC/EP/SW Controller Now
PCIe Gen2 RC/EP/SW Controller Now
PCIe Gen3 RC/EP/SW Controller Now
10G Ethernet MAC Now
DDR2/DDR3 Memory Controller Now
10/100/1000 Mbps Triple-Speed Ethernet MAC Now
Configurable FIFO Module for Triple-Speed Ethernet MAC Now
Configurable FIFO Module for 10G Ethernet MAC Now
AXI BUS Bridge Now
Avalon BUS Bridge Now
Others OD

Functional IP Blocks

Additionally, BaySand offers a comprehensive portfolio of functional system blocks to accelerate your product design.  These IPs are available as both soft macros and MCSC based blocks for maximum design flexibility.  Click on the specific IP block of interest for a complete data sheets of a the functional block.

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IP Description
USB
High/Full Speed Multipoint OTG
  • USB Full Speed OTG Controller
  • USB 2.0 High/Full Speed Function Controller
  • USB High/Full Speed Multi-Point OTG Controller
  • USB 1.1 Full-Speed Function Controller
  • Low Speed Function Controller
  • [Software] USB Software Stack, Source Code for Binary Distribution
ETHERNET
MAC
  • 10/100 Mbps Dual-speed Ethernet MAC
  • 10/100/1000 Mbps Triple-speed Ethernet MAC
  • 10-Gigabit Ethernet MAC
  • Gigabit Ethernet Media Access Controller – used for datacenter blades
PHY Interfaces
  • TP-PMD Interface for PE-MACMII
  • Gigabit Ethernet 8b/10b PCS layer for use with PE-MCXMAC core
  • Serial MII PHY Interface for 10/100Mbps operation
  • Reduced MII PHY Interface for 10/100Mbps operation
  • 10T Endec Interface for PE-MACMII
  • Reduced Gigabit PHY Interface for use with PE-MCXMAC core
  • Serial Gigabit PHY Interface PCS layer w/ optional soft SERDES for use with PE-MCXMAC core
  • XGMII Externder PCS layer (XAUI) for 10-Gigabit Ethernet
  • 64b/66b PCS sublayer (XSBI) for 10-Gigabit Ethernet BASE R applications
Supporting Modules
  • Station Address Logic module for Ethernet MAC
  • Statistics Module for Ethernet MAC
  • Configurable FIFO module for use with the PE-MCXMAC
  • Configurable FIFO module for use with the A-XGMAC
  • AHB Interface for FIFO modules w/ DMA controller
  • Configurable FIFO module for use with the PE-MACMII
  • 10 Gigabit Ethernet Layer 2 Functionality for FPGA Devices
Storage
Serial ATA
  • Serial ATA Host Controller
  • Serial ATA Device Controller With DMA
    • TSMC 130nm LVOD, SMIC 130nm G
Parallel ATA
  • Parallel ATA Host Controller w/ DMA controller & SpeedSelect Technology
  • Parallel ATA-7 Host Controller w/ DMA controller (133MHz)
  • Parallel ATA-6 Host Controller w/ DMA controller (100MHz)
  • Parallel ATA-5 Host Controller w/ DMA controller (66MHz)
  • Parallel ATA-7 Host Controller w/ DMA & RAID support (133MHz)
  • Parallel ATA-7 Device Controller w/ DMA controller (133MHz)
  • Parallel ATA-6 Device Controller w/ DMA controller (100MHz)
  • Parallel ATA-7 Host Controller w/o DMA controller (133MHz)
  • Parallel ATA-6 Host Controller w/o DMA controller (100MHz)
  • Parallel ATA-5 Host Controller w/o DMA controller (66MHz)
  • Parallel ATA-7 Host Controller w/ DMA, PCMCIA, and CompactFlash support (133MHz)
PCMCIA
  • PCMCIA Host Controller
  • PCMCIA Target Controller
CAE CORES
  • DMA Mod. w/ scatter gather cap
CODE ENCRYPTION
  • Viterbi Encoder/Decoder
  • Interleave/Deinterleave
  • 8×8 Discrete Cosine Transform
  • FFT/IFFT/Fast Convolver
  • E1 Deframer (E1-DFRM)
  • T1 Deframer (T1-DFRM)
  • Programmable Reed-Solomon Encoder
  • Programmable Reed-Solomon Decoder
  • T1/E1 Framer (T1E1-FRM)
DqDt GENERATORS
  • QAM Demodulator
  • QPSK Demodulator
  • Concatenated Encoder
  • Concatenated Decoder
  • FIR-Filter
  • RRS Comb Filter
  • QAM/QPSK MODULATOR
PCI CONTROLLER
  • 32Bit 33/66MHz PCI Peripheral Core
  • 64 Bit, 33/66 MHZ PCI Core, 64bit is configured from the base PCI product
OTHER IP
  • 32-bit 33/66MHz PCI Peripheral Core
  • CAN 2.0 Network Controller
  • HDLC Single Chnl Core
  • HDLC-FIFO 1-ch w/FIFO
  • M85230 SCC w/FIFOs
  • M320C50 Dig Signal Processor-SL
  • M8251A USAR-SL
  • M8868 A Compact UART-SL
  • I2C Bus Interface with synchronous CPU I/F
  • I2C V2.0 Bus Interface
  • Enhanced UART with FIFOs and Synchronous CPU I/F
  • Enhanced UART with FIFOs and IrDA support
  • 8-bit Microcontroller
  • Fast 8-bit Microcontroller
  • Fast 8-bit Microcontroller with on-chip debug
  • Fast 8-bit Microcontroller with on-chip debug V3 (40% 3rd party Royalties involved)
  • Fast 8-bit Microcontroller (40% 3rd party Royalties involved)
DDR CONTROLLERS
  • DDR2/DDR3 Controller
  • DDR4 Controller
  • LPDDR2
  • LPDDR3