Codasip and BaySand announced collaboration to make the Codix-Br series or RISC-V compliant processor cores available on BaySand’s UltraShuttle service in 65nm and 40nm.
Codasip and BaySand Partnership Make RISC-V Based ASICs an Ideal Choice for IoT Designs
Codaix-Br series of RISC-V combined with BaySand’s UltraShuttle and MetalCopy offering provide a low cost and low risk access to an SoC ASIC solution
San Jose, CA –(November 10, 2016) – Codasip, a leading-edge processor IP provider, and BaySand, the leader in application configurable ASICs, announced that they are collaborating to make the Codix-Br series of RISC-V compliant processor cores available on BaySand’s new UltraShuttle service in 65nm and 40nm. RISC-V is becoming a pivotal processor standard for leading-edge IoT device designs, and this collaboration enables designers to get products to scale quickly and within modest system development budgets – without the complexity typically associated with custom SoC designs.
Codasip’s Codix-Bk processor IP cores are the industries first commercially available processors that are RISC-V compliant, and are available in multiple configurations to cover a wide range of power and performance points. Additionally, thanks to a unique model-based approach to processor IP design, the Codix-Bk cores can be quickly and easily customized and optimized to the exact needs of any design, delivering significant performance improvements and easing system design by eliminating the need for stand-alone accelerators.
“We are excited to be working with BaySand” said Karel Masarik, CEO, Codasip, “their unique technology and expertise mean that first time IoT design teams can now easily produce and scale custom ASIC designs. When combined with the power and freedom that RISC-V provides, it creates a very exciting time for our customers and the industry as a whole.”
BaySands UltraShuttle multi project wafers (MPW), as well as their MetalCopy FPGA porting technology, offer designers unmatched ease in bringing new designs to market quickly, with low risk, while taking advantage of the cost and scaling advantages that ASIC implementations provide. Thanks to a proven and predictable design flow and a rich IP library, it delivers an ideal solution for IoT class design where power and performance are key.
“RISC-V is rapidly gaining traction in our customer base” said Udi Yuhjtman, BaySand, EVP sales and marketing, “being able to offer Codasip’s proven RISC-V solution, which provided an unmatched level of flexibility and customization, enables our customers designs to deliver the differentiation that is needed for successful products. We believe the combination of BaySand, Codasip, and RISC-V will jumpstart a new era of innovation in the semiconductor industry.”
RISC-V is an open, processor instruction set architecture (ISA) standard supported by the RISC-V foundation (riscv.org) and a large, diverse, set of founding companies (including Codasip) facilitating a rich ecosystem of systems, software, and processor IP vendors sharing a common infrastructure. Unlike proprietary ISAs that dominate the industry today, RISC-V creates an opportunity for collaboration and rapid development of new technologies, something that is especially attractive for the rapidly evolving IoT market.
“RISC-V is already enabling a new approach to embedded design within our member companies, but expanding it reach to the larger design community is key to long term success.”, said Rick O’Connor, Executive Director of the RISC-V Foundation. “This partnership between Codasip and BaySand makes RISC-V based design an option for any design team and helps bring RISC-V into the mainstream.”
To learn more about how Codasip, BaySand, and RISC-V enable a new era of IoT designs you can attend the upcoming RISC-V workshop (riscv.org/2016/10/5th-risc-v-workshop-agenda) or register for our Dec 15th webinar on the collaboration.
Codasip delivers leading-edge processor IP technology that provides the advantages of industry standard processor IP with the ability to optimize for your unique application. Codasip’s unique model-based processor IP, and application analysis technology, makes processor customization and optimization available to any design team. As a founding member of the RISC-V foundation (riscv.org) and long term supplier of LLVM and GNU based processor solutions Codasip is committed to open standards for embedded processors. Formed in 2006 and headquartered in Brno, Czech Republic, Codasip currently has offices in the US and Europe. More information on Codasip’s products and services is available at www.codasip.com.
About BaySand Incorporated
BaySand is the leader in application configurable ASICs targeting short time-to-market and cost-effective ASIC solutions. With its unique and patented Metal Configurable Standard Cell (MCSC) technology and Field Configurable DSP (fcDSP) architecture, the company provides ASIC designers with world-class solutions featuring low non-recurring engineering costs, short time-to-market, low power, low unit cost, high performance, programmability and flexibility. BaySand is fabless, privately held and based in the Silicon Valley, San Jose CA. For further information about BaySand, visit http://www.baysand.com.
About the RISC-V Foundation
RISC-V (pronounced “risk-five”) is a new instruction set architecture (ISA) that was originally designed to support computer architecture research and education and is now set to become a standard open architecture for industry implementations under the governance of the RISC-V Foundation. The RISC-V ISA was originally developed in the Computer Science Division of the EECS Department at the University of California, Berkeley.
The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V Foundation have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.
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