BaySand introduce an enhanced methodology that enables FPGA designers to efficiently convert FPGA designs to ASIC in short time and low risk. The Metal Copy-28 (MC-28) product line is based on the BaySand FG65L technology that can meet and exceed the performance of 28nm FPGAs and deliver up to 50% lower power at the fraction of the FPGA unit price.
BaySand Introduces Enhanced FPGA to ASIC Conversion Program With IP Partners and Supporting Tools
Metal Copy-28 Matches 28nm FPGA Capabilities, While Significantly Reducing Power Consumption and at a Fraction of the FPGA Unit Price
SAN JOSE, CA-(Marketwired – October 11, 2016) – BaySand, the leader in application configurable ASICs, to introduce an enhanced methodology that enables FPGA designers to efficiently convert FPGA designs to ASIC in short time and low risk. The Metal Copy-28 (MC-28) product line is based on the BaySand FG65L technology that can meet and exceed the performance of 28nm FPGAs and deliver up to 50% lower power at the fraction of the FPGA unit price. The technology supports PCI-Gen 2.0, PLLs, memory blocks, micro controllers as well as third party Intellectual Property (IP) provided by BaySand IP partners. The flow and methodology is well supported by BaySand Metal Configurable Standard Cell (MCSC) technology, BaySand’s newly introduced ASIC UltraShuttle program and BaySand’s Xpresso tool for IP generation.
The Metal Copy-28 combined with the ASIC UltraShuttle-65 creates an innovative conversion flow that delivers a low risk process which results in a working verified device in a short and predictable time. ASIC UltraShuttle-65 is based on one-time design with proven design flow and methodology that supports production ready verified and fully tested Engineering Samples (ES). Once the ES are verified BaySand is ready to deliver mass production units at low, mid and high volume.
The Metal Copy-28 conversion program includes the Xpresso tool, minimizing risk, reducing the cost and shortening the time-to-market. Xpresso is capable of generating IPs that are fully compatible with the FPGA IP resulting in bridging the gap between the IP that FPGA vendors provide and the IPs required for the ASIC migration. The IPs are provided with verification IP (VIP) from third parties including Avery Design Systems. BaySand has been working closely with Avery for its IP verification and now are making it available to ASIC designers.
“We are pleased to see BaySand taking a step towards approaching the FPGA to ASIC migration with fully verified IP and by that enhancing the conversion quality,” said Chris Browy, VP Sales and Marketing, from Avery Design Systems. “Avery has been supporting BaySand’s IP verification efforts for several years in areas including PCIe, SATA, DDR3, and USB. Providing a complete verification environment and VIP is essential to streamline the FPGA to ASIC migration.”
“We are continuously innovating and bring unique methodologies to the ASIC and semiconductors industry. This enhanced process will assure smooth conversion from FPGAs by providing the ability to have ES devices prior to committing to full volume production,” said Salah Werfelli, BaySand founder and CEO. “Combined with the BaySand ASIC UltraShuttle-65 program, we open a new capability that was not available before, and FPGA designer will be able to test the conversion with real silicon and sign off to production with at no risk.”
About BaySand Incorporated
BaySand is the leader in Application Configurable ASICs targeting short time to market and cost effective ASIC solutions. With its unique and patented Metal Configurable Standard Cell (MCSC) technology and Field Configurable DSP architecture (fcDSP), the company provides ASIC designers with world class solutions featuring:
- Low NRE
- Short time to market
- Lowest Power
- Low unit cost
- Best performance
- Programmability and flexibility
BaySand is fabless, privately held and based in the Silicon Valley, San Jose CA.